Numerical Model for 32-bit Magnonic Ripple Carry Adder

In CMOS-based electronics, the most straightforward way to implement a summation operation is use ripple carry adder (RCA). Magnonics, field of science concerned with data processing by spin-waves and their quanta magnons, recently proposed magnonic half-adder that can be considered as simplest integrated circuit. Here, we develop computation model for basic blocks enable design simulation gates circuits arbitrary complexity demonstrate its functionality on example 32-bit RCA. It shown RCA requires utilization additional regenerators based directional couplers embedded amplifiers normalize magnon signals in-between half-adders. The benchmarking large-scale performed. energy consumption 30 nm-based low 961aJ per taking into account all required amplifiers.